OBC
The SRMSAT has single microcontroller architecture. The microcontroller operates at 28.8MHz and the peripherals include USART (Universal Synchronous Asynchronous Receiver Transmitter), DMAC (DMA Controller), SPI (Serial Peripheral Interface), SSC (Serial Synchronous Controller), RTT (Real Time Timer), RTC (Real Time Clock), TWI (Two Wire Interface), PWM(Pulse Width Modulator) and I2C. The On Board Computer is interfaced with the payload, a Space GPS, Magnetometer, Beacon, Transmitter and Receiver. The storage module consists of four memory devices:- a 4MB NVSRAM for code, a 4MB NORFLASH for the payload data, 128 KB of EEPROM as booting memory and 1MB of FRAM as system memory. The onboard computer will run on an in house developed Real Time Operating System Suite. The codes and operating system are stored in flash memory. A new scheme of error correction coding is employed that matches the reliability of Reed Solomon + Convolutional Coding combination.
